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WIZ810SMJ

WIZ810SMJ

The WIZ810SMJ is a versatile Ethernet module based on the W5100S hardwired TCP/IP chip with integrated PHY and RJ45 (MAG-JACK).
It supports both SPI and Parallel System Bus interfaces, allowing flexible connectivity options for embedded network systems.
With full hardware TCP/IP stack offload and minimal design effort, it is an ideal choice for rapid Ethernet integration.


Pin Information​

P1​

PinTypeNameDescription
1PGNDGround
2PINTnInterrupt output (active low)
3P3V3D3.3 V Power
4IMODESPI/BUS Select pin
SPI : Low
BUS : High
5ISCSnSPI Chip select (active low)
6ISCLKSPI Clock input
7IMOSI/A0SPI : Master-Out / Slave-In
BUS : A0
8O/IMISO/A1SPI : Master-In / Slave-Out
BUS : A1
9IRDnRead Strobe
SPI : indicates Read Operation
BUS : indicates Read Operation
10IWRnWrite Strobe
SPI : indicates Read Operation
BUS : indicates Write Operation

P2​

PinTypeNameDescription
1IRSTnHardware reset (active low, ≥ 1 µs)
2OINTnInterrupt output (low-active)
3IOD7Data Bus pin SPI : DAT [7:0] must be floated.
BUS : Data is carried over DAT [7:0] between HOST and W5100S
4IOD6Data Bus pin SPI : DAT [7:0] must be floated.
BUS : Data is carried over DAT [7:0] between HOST and W5100S
5IOD5Data Bus pin SPI : DAT [7:0] must be floated.
BUS : Data is carried over DAT [7:0] between HOST and W5100S
6IOD4Data Bus pin SPI : DAT [7:0] must be floated.
BUS : Data is carried over DAT [7:0] between HOST and W5100S
7IOD3Data Bus pin SPI : DAT [7:0] must be floated.
BUS : Data is carried over DAT [7:0] between HOST and W5100S
8IOD2Data Bus pin SPI : DAT [7:0] must be floated.
BUS : Data is carried over DAT [7:0] between HOST and W5100S
9IOD1Data Bus pin SPI : DAT [7:0] must be floated.
BUS : Data is carried over DAT [7:0] between HOST and W5100S
10IOD0Data Bus pin SPI : DAT [7:0] must be floated.
BUS : Data is carried over DAT [7:0] between HOST and W5100S

Features​

  • Supports Hardwired TCP/IP protocols: TCP, UDP, ICMP, IGMPv1/v2, IPv4, ARP, PPPoE
  • 4 independent sockets for simultaneous connections
  • Supports Wake-on-LAN (UDP) and SOCKET-less commands (ARP, PING)
  • High-speed SPI and Parallel Bus Interface (2 address, 8-bit data)
  • Integrated transformer and RJ45 (MAG-JACK)
  • Auto-Negotiation and Auto-MDIX (10/100 Mbps)
  • Power-down and clock gating for low power operation
  • Compact size: 2 × 10-pin headers (2.54 mm pitch)
  • Operating temperature: −40 °C to +85 °C

Electrical Characteristics​

SymbolParameterPinsMinTypMaxUnit
VDDSupply voltage3.3 V2.973.33.63V
VIHHigh-level inputALL2.0–-V
VILLow-level inputALL––0.8V
VOHHigh-level outputALL2.43.3–V
VOLLow-level outputALL-–0.4V

Documentation​

TitleDescriptionLink
User ManualTechnical documentation for WIZ810SMJ moduledownload WIZ810SMJ Datasheet v1.0

Software Resources​

Driver

ResourceDescription
link ioLibrary_DriverOfficial WIZnet driver library supporting W5100S and related Ethernet controllers

Note: The ioLibrary_Driver is an MCU-independent software library that provides TCP/IP stack and application protocols (DHCP, DNS, HTTP, etc.) for WIZnet’s hardwired Ethernet chips.


Hardware Resources​

TitleRevisionDescriptionDownloadNotes
schematic1.0Circuit diagram for hardware design referencedownload PDF
download Altium
—
3D File1.03D model for mechanical design and visualizationdownload STEP—
Part list1.0List of components used in the hardwaredownload PDF—

Mechanical Information​

  • Form factor: ioModule with integrated RJ45 MAG-JACK
  • Pin pitch: 2.54 mm (pin header)
  • Dimensions: 52.00 x 25.00 (mm)

ProductDescription
W5100S ChipHardwired TCP/IP Ethernet controller with PHY
WIZ810SioCompact SPI Ethernet module using W5100S