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Pin Assignment

Pin Layout

W7500 Pin Layout

pin layout

Pin Description

Description
PinSymbolTypeMain2nd3rd4th
1PC_08AIOPWM0 / CAP0GPIO3_8SCL0AIN7
2PC_09AIOPWM1 / CAP1GPIO3_9SDA0AIN6
3PC_10AIOU_TXD2GPIO3_10PWM2 / CAP2AIN5
4PC_11AIOU_RXD2GPIO3_11PWM3 / CAP3AIN4
5PC_12AIOAIN3GPIO3_12SSEL0AIN3
6PC_13AIOAIN2GPIO3_13SCLK0AIN2
7PC_14AIOAIN1GPIO3_14MISO0AIN1
8PC_15AIOAIN0GPIO3_15MOSI0AIN0
9GNDGNDGround
10VDDPWRVDD
11PD_00IOCRS/TXD3GPIO4_0
12PD_01IORXDV/TXD2GPIO4_1
13PD_02IORXD0/TXD1GPIO4_2
14PD_03IORXD1/TXD0GPIO4_3
15PD_04IORXD2/TXCLKGPIO4_4
16PB_06IORXD3/DUPGPIO2_6
17PB_07IORXCLK/RXCLKGPIO2_7
18PB_08IODUP/RXD3GPIO2_8
19PB_09IOTXCLK/RXD2GPIO2_9
20PB_10IOTXD0/RXD1GPIO2_10
21PB_11IOTXD1/RXD0GPIO2_11
22PB_12IOTXD2/RXDVGPIO2_12
23PB_13IOTXD3/CRSGPIO2_13
24PB_04IOTXENGPIO2_04
25PB_05IOCOLGPIO2_05
26PB_14IOMDIO/MDCGPIO2_14
27PB_15IOMDC/MDIOGPIO2_15
28RSTnIRSTn
29PA_00IOGPIO1_0GPIO1_0PWM6/CAP6
30PA_01IOTXD0/RXD1GPIO1_1PWM7/CAP7
31PA_02IOGPIO1_2GPIO1_2CLKOUT
32TESTGNDGround
33PA_05IOSSEL0GPIO1_5SCL1PWM2/CAP2
34PA_06IOSCLK0GPIO1_6SDA1PWM3/CAP3
35PA_07IOMISO0GPIO1_7U_CTS1PWM4/CAP4
36PA_08IOMOSI0GPIO1_8U_RTS1PWM5/CAP5
37PA_09IOSCL0GPIO1_9U_TXD1PWM6/CAP6
38PA_10IOSDA0GPIO1_10U_RXD1PWM7/CAP7
39BOOTIOBOOT
40PA_11IOU_CTS0GPIO1_11SSEL1
41PA_12IOU_RTS0GPIO1_12SCLK1
42PA_13IOU_TXD0GPIO1_13MISO1
43PA_14IOU_RXD0GPIO1_14MOSI1
44PA_15IOGPIO1_15GPIO1_15
45PB_00IOSSEL1GPIO2_0U_CTS0
46PB_01IOSCLK1GPIO2_1U_RTS0
47PB_02IOMISO1GPIO2_2U_TXD0
48PB_03IOMOSI1GPIO2_3U_RXD0
49PA_03IOSWCLKGPIO1_3PWM0/CAP0
50PA_04IOSWDIOGPIO1_4PWM1/CAP1
51PC_06IOGPIO3_6GPIO3_6U_TXD2
52PC_07IOGPIO3_7GPIO3_7U_RXD2
53PC_00IOU_CTS1GPIO3_0PWM0/CAP0
54PC_01IOU_RTS1GPIO3_1PWM1/CAP1
55PC_02IOU_TXD1GPIO3_2PWM2/CAP2
56PC_03IOU_RXD1GPIO3_3PWM3/CAP3
57PC_04IOSCL1GPIO3_4PWM4/CAP4
58PC_05IOSDA1GPIO3_5PWM5/CAP5
59GNDGNDGround
60NCNCNot Connected
61VDDPWRVDD
62GNDGNDGround
63XTAL_INIXtal in
64XTAL_OUTOXtal out