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Peripheral Registers

P0, P1, P2, P3 : Port register. Set direction and read or write pin logic. Go down to section 'I/O Ports' for the detailed functionality of the I/O Ports.
Px_PD : Port Pull-Down register. Activate 85k Pull-Down resistor at specific Port Pin. Go down to section 'I/O Ports' for the detailed functionality of the I/O Ports.
Px_PU : Port Pull-Up register. Activate 4k7 Pull-Up resistor at specific Port Pin. Go down to section 'I/O Ports' for the detailed functionality of the I/O Ports.
TCON(0x88) : Timer 0, 1 configuration register. Go to section 'Timer' for the Functionality of Timer 0 and Timer 1.

TMOD(0x89) : Timer 0, 1 control mode register. Go to section 'Timer' for the Functionality of Timer 0 and Timer 1.
TH0(0x8C), TL0(0x8A) : Counter register of timer 0. Go to section 'Timer' for the Functionality of Timer 0 and Timer 1.

TH1(0x8D), TL1(0x8B) : Counter register of timer 1. Go to section 'Timer' for the Functionality of Timer 0 and Timer 1.
SCON(0x98) : UART Configuration Register. Go to section 'UART' for the Functionality of UART.
SBUF(0x99) : UART Buffer Register. Go to section 'UART' for the Functionality of UART.`
IE(0xA8) : UART Bits in Interrupt Enable Register. Go to section 'UARTโ€˜ for the Functionality of UART.
IP(0xB8) : UART Bits in Interrupt Priority Register. Go to section 'UARTโ€˜ for the Functionality of UART.
TA(0xC7) : Timed Access Register. Go to section 'Watchdog Timer' for Timed Access Registers of Watchdog Timer.
T2CON(0xC8) : Timer 2 Configuration Register. Go to section 'Timer' for the Functionality of Timer 2
RLDH(0xCB), RLDL(0xCA) : Capture Registers of Timer 2. Go to section 'Timer' for the Functionality of Timer 2
TH2(0xCD), TL2(0xCC) : Counter Register of Timer 2. Go to section 'Timer' for the Functionality of Timer 2
PSW(0xD0) : Program Status Word Register. For detail information, please refer to the section 'ALU'.

WDCON(0xD8) : Watchdog Control Register. Go to section 'Watchdog Timer' for Timed Access Registers of Watchdog Timer.


I/O Ports , P0, P1, P2, P3#

io_ports The GPIO of the W7100A MCU has fife operating modes, 'active low', 'high Z', 'Pull-up', 'Pull-down' and 'Keep' according to the SFR values. The output driver is a simple open drain stage and not a Push-Pull output. Therefore a low-impedant 'high' to the output must be performed with the internal 4k7 pull-up resistor.
With the port registers Px the direction (in or out) of the port pins is selected.
With the registers Px_PD and Px_PU the internal Pull-Down and Pull-Up resistors are activated.
The 'Keep' mode can be made by setting up both pull-up and pull-down register simultaneously.
The GPIO port register keeps its previous value in the 'Keep' operating mode until leaving Keep-Mode.
The I/O port pin functionalities are described in the following table:

I/O Ports Pin Description#

PinActiveTypePu/PdDescription
P0[7:0]-IO-Port0 input / output
P1[7:0]-IO-Port1 input / output
P2[7:0]-IO-Port2 input / output
P3[7:0]-IO-Port3 input / output

Some port-reading instructions read from the data registers while others read from the port pin.
The "Read-Modify-Write" instructions are directed to the data registers as shown below.

Read-Modify-Write Instructions (register access)#

InstructionFunction Description
ANLLogic AND
ORLLogic OR
XRLLogic exclusive OR
JBCJump if bit is set and cleared
CPLComplement bit
INC, DECIncrement, decrement byte
DJNZDecrement and jump if not zero
MOV Px.y, CMove carry bit to bit y of port x
CLR Px.yClear bit y of port x
SETB Px.ySet bit y of port x

All other instructions read from a port exclusively through the port pins. All port pins can be used as GPIO (General Purpose Input Output). The output driving voltage of the GPIO is 0V or 3.3V according to the Px_PD and Px_PU SFR value or the GPIO keeps its previous value in current operation mode. \

Read and write accesses are performed in the I/O ports via their corresponding SFR: P0 (0x80), P1 (0x90), P2 (0xA0), and P3 (0xB0). \ |Px |Status | |-----|-------| | 0 | output | | 1 | input (tri-state) |

Internal pull-down (85k) and pull-up (4k7) resistors are activated by Px_PD (0xE3..0xE6) and Px_PU (0xEB..0xEE) register. \ |Px_PU | Px_PD | Status | |------|--------|-------| | 0 | 0 | - | | 0 | 1 | Pull-down | | 1 | 0 | Pull-up | | 1 | 1 | Keep mode |

Use case: Output#

For best output performance activate Px_PU (4k7 pull-up) and use direction register Px to set the port pin to 0 or 1.

direct.PxPx_PDPx_PUoutannotation
out0000low imp. (no internal current)
::::::010low imp. (0.7mA current in 4k7)
'in'10114k7 pull-up

Use case: Input#

For best input performance write '1' into the Px register. This will make the port pin high impedant and set input direction. Additionally and if needed activate the internal resistors with the Px_PD or Px_PU registers corresponding to your external circuit.
A read operation on the Px register is done directly to the Port Pin status.

directPxPx_PDPx_PUinannotation
in100-high imp. - tri-state (2.5V)
::::::0114k7 pull-up
::::::10085k pull-down
::::::11-Keep mode

All peripheral registers:#

P0(0*80)

76543210Reset value
P0.7P0.6P0.5P0.4P0.3P0.2P0.1P0.00xFF

P1 (0x90)#

76543210Reset value
P1.7P1.6P1.5P1.4P1.3P1.2P1.1P1.00xFF

P2 (0xA0)#

76543210Reset value
P2.7P2.6P2.5P2.4P2.3P2.2P2.1P2.00xFF

P3 (0xB0)#

76543210Reset value
P3.7P3.6P3.5P3.4P3.3P3.2P3.1P3.00xFF